About this previous year paper
This document is a B.Tech (Semester IV) Theory Examination paper for the course BOE408 – Analog Electronics Circuits, conducted for the academic year 2023–2024.
It is a 3-hour, 70-mark examination designed to evaluate students’ understanding of analog electronic devices, transistor biasing, amplifier configurations, feedback concepts, oscillators, differential amplifiers, op-amp circuits, current mirrors, and waveform generation.
The paper includes short conceptual questions, analytical descriptions, numerical problems, diagram-based questions, and design-oriented questions.
SECTION A – Short Answer Questions (14 Marks)
Seven questions worth 2 marks each. These test basic theoretical knowledge:
Functions of a diode in electronic circuits
Definition of voltage amplifier & current amplifier
Gain margin & phase margin in amplifier stability
Example of a non-sinusoidal oscillator
Meaning of CMRR in differential amplifiers
Definition of ICMR (Input Common Mode Range)
Ideal characteristics of an op-amp
These questions assess fundamental electronic concepts.
SECTION B – Medium-Length Analytical Questions (21 Marks)
Students must attempt any three out of five:
a. Fixed Bias Configuration of BJT Amplifier
Explanation of circuit, working, advantages (simple design) and disadvantages (poor stability).
b. Cascode Amplifier
Structure (CE + CB stages), high gain, high bandwidth, and improved isolation.
c. Oscillator Basics + Barkhausen Criterion + Numerical
Definition of oscillator
Conditions for sustained oscillations RC-phase shift oscillator with:
R = 100 kΩ C = 600 pF
Calculation of frequency of oscillation.
d. Differential Amplifier Principle
How differential input is amplified, common-mode noise rejection, and output voltage expression.
e. Inverting Op-Amp Amplifier (Design + Derivation)
Gain expression: Av=−RfRinA_v = -\frac{R_f}{R_{in}}Av=−RinRf
Design of an inverting amplifier with:
Gain = –5 Input resistance = 10 kΩ
This section tests deeper understanding + numerical application.
SECTION C – Long, Design-Oriented & Diagram-Based Questions (35 Marks)
Each question has two options, attempt one from each.
3. Transistor Amplifiers – CE Configuration / Biasing (7 Marks)
Option (a)
Explain Common-Emitter (CE) configuration:
High voltage gain 180° phase shift
Input/output characteristics
Option (b)
Purpose of biasing, and self-biasing in FET amplifiers.
4. Class C Amplifiers / Voltage-Series Feedback (7 Marks)
Option (a)
Operation of Class C amplifier, conduction angle < 180°, high efficiency, typical RF applications.
Option (b)
How voltage-series feedback affects amplifier:
Gain decreases Bandwidth increases
Distortion reduces Stability improves
5. Oscillators – Wien Bridge / Hartley (7 Marks)
Option (a)
Working, advantages, and limitations of Wien Bridge Oscillator.
Option (b)
Structure and oscillation generation of Hartley Oscillator using tapped inductors.
6. Op-Amp Gain Stage Design / Current Mirror (7 Marks)
Option (a)
Design considerations of high-gain op-amp stages, stability techniques.
Option (b)
Current mirror topology, circuit diagram and working—constant current output despite load variations.
7. Summing Amplifier Output / Precision Rectifier (7 Marks)
Option (a)
, calculate output voltage using superposition & inverting gain formula.
Option (b)
Design & working of precision full-wave rectifier using op-amp.
Overall Purpose of the Document
This exam paper thoroughly evaluates student skills in:
Analog Device Fundamentals
Diodes, BJTs, FETs, op-amps.
Amplifier Theory & Design
Biasing, CE configuration, differential amplifiers, op-amp applications.
Feedback and Stability
Gain margin, phase margin, voltage-series feedback effects.
Oscillator Circuits
RC phase-shift, Wien bridge, Hartley oscillator, Barkhausen criterion.
Waveform Generation & Rectification
Precision rectifiers, summing amplifiers, waveform calculation.
Current Mirrors & Transistor Operations
Basic topology, operation, and applications.
Overall, the paper includes definitions, formulas, derivations, circuit diagrams, frequency calculations, and design problems, ensuring complete assessment of Analog Electronics Circuits.