Previous year paper

THEORY EXAMINATION (SEM–IV) 2016-17 COMPUTER ORGANIZATION

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About this previous year paper

Subject: Computer Organization (ECS401)

Exam Type: Theory
Semester: IV (4th Semester)
Time: 3 Hours
Maximum Marks: 100

Section A – Short Answer Questions (10 × 2 = 20 Marks)

This section includes ten short conceptual questions designed to test your understanding of the fundamentals of computer hardware, architecture, and control systems

Topics covered:

Multiplexer: Definition and applications in data selection.

BCD Representation: Bit configuration of a 24-bit register representing decimal 195.

Self-Complementing BCD Code: Meaning and examples.

Microcode: Concept, purpose, and use in control unit design.

Wide Branch Addressing: Explanation and use.

RISC Architecture: Characteristics and advantages.

Indirect Addressing: Explanation with example.

Write-Back Method: Function in cache and memory updates.

Flash Memory: Definition and working principle.

Asynchronous Data Transfer: Concept and its role in system communication.

Section B – Descriptive and Problem-Solving Questions (5 × 10 = 50 Marks)

This section focuses on numerical problems, logic operations, and hardware-based questions that test analytical and practical understanding

Key questions include:

Performing logic microoperations on an 8-bit binary register to change values.

Hardware implementation of selective set and selective complement operations.

Writing an assembly-style program to evaluate:

  • X=(A−B+C×(D×E−F))/(G+H×K)X = (A - B + C \times (D \times E - F)) / (G + H \times K)X=(A−B+C×(D×E−F))/(G+H×K)

using both general register and accumulator type computers.

Explaining different I/O bus architectures.

Discussing hardwired control and DMA (Direct Memory Access).

Writing short notes on Serial Communication and Input/Output Processor (IOP).

Solving a virtual memory problem using a page table (with 8 pages and 4 blocks) to identify page faults.

Explaining decoder design — block diagram of a 2-to-4 line decoder using NAND gates, and its truth table.

Section C – Long Analytical Questions (2 × 15 = 30 Marks)

These questions require detailed derivations, block diagrams, and explanations on system organization and data transfer mechanisms

DMA Controller:

Draw and explain its block diagram.

Discuss why read and write control lines in DMA are bidirectional.

Explain the working of the I/O Processor.

Asynchronous Data Transfer:

Explain the strobe control and handshaking mechanism used in asynchronous data transfer.

Perform number system conversions:

(100100)2=(?)10(100100)_2 = (?)_{10}(100100)2​=(?)10​

(235.41)7=(?)13(235.41)_7 = (?)_{13}(235.41)7​=(?)13​

Microinstruction and Processor Design:

Show how a 9-bit microinstruction field can be divided into subfields to specify 46 different operations.

Explain how a processor executes instructions, detailing internal functional units and their interconnections.

Major Topics Covered

Logic circuits and microoperations

Control unit design (hardwired & microprogrammed)

Instruction cycle and execution

Memory organization (cache, flash, virtual memory)

DMA and I/O Processor

Addressing modes and instruction formats

Number system conversions

Data transfer techniques (synchronous & asynchronous)

Purpose of the Paper

This exam tests your conceptual and practical understanding of how a computer works internally — how data flows between registers, memory, and control units, and how the CPU interacts with peripheral devices through I/O and DMA systems.

It blends logical design, hardware control, and programming-level understanding, making it foundational for further study in Computer Architecture and Embedded Systems.

TypePrevious year paper
SubjectComputer Science
Board / courseB.Tech
FilePDF · 53.28 KB
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