About this previous year paper
Course: B.Tech (Electronics & Communication Engineering)
Subject Code: NEC409
Subject Title: Introduction to Microprocessor
Exam Type: Theory
Duration: 3 Hours
Maximum Marks: 100
SECTION – A (10 × 2 = 20 Marks)
Short-answer questions testing fundamentals of 8085/8086 microprocessors.
| No. | Topic | Key Concept |
|---|---|---|
| (a) | Memory Chip Design | For 8K-byte memory using 1024×1 chips → 8K×8 = 64K bits; each chip = 1K bit ⇒ 64 chips required. |
| (b) | Hardware vs Software Interrupts (8085) | Hardware interrupts (e.g., RST7.5, INTR) are externally triggered; software interrupts (RST n) are generated by instructions. |
| (c) | Pipelining in 8086 | Enables simultaneous fetching and execution of instructions → increases throughput. |
| (d) | RIM & SIM Instructions (8085) | RIM = Read Interrupt Mask, reads status; SIM = Set Interrupt Mask, controls serial output and interrupt enable. |
| (e) | Port Input/Output | Example: IN 07H, OUT 00H, IN 08H, MOV B,A → reads ports and stores/transfers data. |
| (f) | HOLD & READY Pins | HOLD → DMA request; READY → synchronize slow peripherals. |
| (g) | Wait State | Extra clock cycle inserted when slower devices delay response. |
| (h) | RAL vs RRC Instructions | RAL = rotate left through carry; RRC = rotate right without carry. |
| (i) | SUB A Instruction | Subtracts accumulator from itself → result = 00H, sets Z=1, CY=0. |
| (j) | BSR Mode of 8255 | Used for bit set/reset operations on Port C; control word format includes bit control flags. |
SECTION – B (5 × 10 = 50 Marks)
Long-answer and programming questions involving assembly coding, timing, and interfacing.
Key Questions and Concepts:
Flag Register of 8085
5 flags: S (Sign), Z (Zero), AC (Auxiliary Carry), P (Parity), CY (Carry).
Example operations show flag changes after each instruction (SUB A, MOV B,A, etc.).
Timing Diagram of MVI A, 46H
Explains opcode fetch + memory read cycles.
Shows T-states and control signals (ALE, RD’, IO/M’).
8237 DMA Controller
Transfers data directly between I/O and memory.
Key blocks: Control Logic, DMA Channels, Address Register, Command Register.
Assembly Programs:
(i) Block Transfer Program: Copy 2050H–205FH → 2070H onwards using MOV, INX, DCX, MOVM.
(ii) String Blank Removal: Loop using CMP to detect blank (20H) and skip.
8086 Pin Diagram
Divided into AD0–AD15 multiplexed lines, control pins (RD’, WR’), status signals, and clock/reset pins.
Explanation of minimum vs maximum mode.
Counter Program (8085):
Count 0–9 with 1-second delay using HL pair.
Example: Delay loop designed for 1 MHz clock (~1 second using 10⁶ T-states).
Binary–BCD Conversion & 7-Segment Display:
Binary to BCD using repeated division by 10.
BCD to 7-segment via lookup table or mask codes.
Stack & Subroutine Concepts:
Stack = LIFO structure (using SP).
Subroutines called using CALL and returned using RET.
Interfacing 8K SRAM & 8K EPROM:
Address line mapping (A0–A12) and chip select logic.
Memory map for 0000H–1FFFH (SRAM) and 2000H–3FFFH (EPROM).
SECTION – C (2 × 15 = 30 Marks)
Analytical and system-level programming questions.
Q3: Interrupts and Addressing Modes
8085 Interrupts: TRAP (non-maskable), RST7.5, RST6.5, RST5.5 (maskable), INTR.
Vector Addresses: TRAP = 0024H, RST7.5 = 003CH, RST6.5 = 0034H, RST5.5 = 002CH, INTR = determined externally.
Addressing Modes: Immediate, Register, Direct, Indirect, and Implied — with examples.
Q4: 8255 & 8254 Programming
BSR Mode Subroutine: To set PC7 and PC3 for 10 ms and reset using delay routine.
8254 Timer Configuration: Generate 1 kHz square wave using control word at 83H, counter 1 at 81H.
Gate = +5V keeps counter enabled continuously.
Q5: Architecture and Modes
8255 PPI Architecture:
Ports A, B, C (Group A/B) with Mode 0 (simple I/O), Mode 1 (strobed), Mode 2 (bidirectional).
8254 PIT Modes:
Mode 0: Interrupt on Terminal Count
Mode 1: Hardware Retriggerable One-Shot
Mode 2: Rate Generator
Mode 3: Square Wave Generator
Mode 4: Software Triggered Strobe
Mode 5: Hardware Triggered Strobe
Summary
This NEC409 – Introduction to Microprocessor exam comprehensively evaluates:
8085/8086 architecture & timing
Assembly language programming skills
Peripheral interfacing (8237, 8255, 8254)
Interrupts, addressing modes, and control words